On 19-21 April 2017, Communications Engineering Program (CE) organized A Block Lecture and Workshop on the topic "Design Technologies for Embedded Multiprocessor Systems on Chip" by Prof. Dr. rer. nat. Rainer Leupers, Director of Institute for Communication Technologies and Embedded Systems (ICE) at RWTH Aachen University, Germany at Computer room 406, 4th floor, Office of the President Building, KMUTNB.
Throughout this Block Lecture and Workshop, the participants received a knowledge that "The trend towards Multi core and even Many core architectures affects virtually all areas of computing today. Especially in the mobiles and consumer domains, an extremely high architectural efficiency (MIPS/Watt) is required. In order to manage the complexity of multi-billion transistor IC designs with dozens of heterogeneous processing engines, advanced Electronic System Level (ESL) tools are required. ESL can be roughly subdivided into four categories: architecture modeling and optimization, application SW mapping, simulation and verification, and efficient processing element design. After a general introduction to embedded MPSoC (Multiprocessor Systems-on-Chip) architectures and ESL technologies, the course covered aspects from the above four domains, in particular SoC architecture optimization, embedded multi core SW development, and virtual prototypes. The lectures was complemented with hands-on lab sessions using latest industrial multi core SW development tools. On the last day, a written final test was offered."